gergof/Prolife_F1
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Prolife_F1/circuit/circuit.dsn
Fándly Gergő 37522d26fc Dump from SVN
2019-08-08 17:09:21 +03:00

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(pcb H:\Munkák\Prolife_F1\circuit\circuit.dsn
(parser
(string_quote ")
(space_in_quoted_tokens on)
(host_cad "KiCad's Pcbnew")
(host_version "4.0.7")
)
(resolution um 10)
(unit um)
(structure
(layer F.Cu
(type signal)
(property
(index 0)
)
)
(layer B.Cu
(type signal)
(property
(index 1)
)
)
(boundary
(rect pcb 12612.9 -11635 275146 -163755)
)
(via "Via[0-1]_600:400_um")
(rule
(width 250)
(clearance 200.1)
(clearance 200.1 (type default_smd))
(clearance 50 (type smd_smd))
)
)
(placement
(component Capacitors_THT:CP_Radial_D6.3mm_P2.50mm
(place C1 15240 -31750 front 0 (PN "100 uF"))
(place C2 22860 -31750 front 0 (PN "100 uF"))
)
(component Capacitors_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm
(place C3 36830 -33020 front 0 (PN "22 pF"))
(place C4 39370 -40640 front 180 (PN "22 pF"))
)
(component Displays:WC1602A
(place DS1 21590 -64770 front 0 (PN WC1602A))
)
(component "Connectors:PINHEAD1-2"
(place J1 17780 -16510 front 0 (PN Power_in))
(place J2 203200 -114300 front 0 (PN Serial))
(place JP1 247650 -148590 front 0 (PN "Reset switch"))
)
(component Connectors:PINTST
(place J3 173990 -60960 front 0 (PN TIMED_1))
(place J4 121920 -107950 front 0 (PN TIMED_2))
(place J5 158750 -106680 front 0 (PN TIMED_3))
)
(component Resistors_THT:R_Axial_DIN0309_L9.0mm_D3.2mm_P12.70mm_Horizontal
(place R1 44450 -130810 front 0 (PN "10 kOhm"))
(place R2 157480 -160020 front 0 (PN "100 kOhm"))
(place R3 17780 -132080 front 90 (PN "10 kOhm"))
(place R4 29210 -147320 front 0 (PN "10 kOhm"))
(place R5 43180 -138430 front 0 (PN "10 kOhm"))
)
(component "Potentiometers:Potentiometer_Trimmer-EVM3E"
(place RV1 259080 -74930 front 0 (PN "100 kOhm"))
)
(component Buttons_Switches_THT:SW_PUSH_6mm_h13mm
(place SW1 17780 -109220 front 0 (PN SW_DIP_x01))
(place SW2 31750 -109220 front 0 (PN SW_DIP_x01))
(place SW3 83820 -113030 front 0 (PN SW_DIP_x01))
)
(component "TO_SOT_Packages_THT:TO-220-3_Vertical"
(place U1 17780 -24130 front 0 (PN L7805))
)
(component Pin_Headers:Pin_Header_Straight_1x05_Pitch1.00mm
(place U3 142240 -138430 front 0 (PN DS1307))
)
(component Pin_Headers:Pin_Header_Straight_1x03_Pitch1.00mm
(place U4 157480 -121920 front 0 (PN DS18B20))
)
(component "Housings_DIP:DIP-28_W7.62mm_Socket"
(place U5 74930 -15240 front 0 (PN MCP23017))
(place U2 50800 -15240 front 0 (PN "ATMEGA328-PU"))
)
(component Pin_Headers:Pin_Header_Straight_1x06_Pitch1.00mm
(place U6 101600 -101600 front 0 (PN ULN2003_breakout))
(place U7 116840 -124460 front 0 (PN ULN2003_breakout))
(place U8 267970 -101600 front 0 (PN ULN2003_breakout))
(place U9 160020 -60960 front 0 (PN ULN2003_breakout))
(place U10 133350 -44450 front 0 (PN ULN2003_breakout))
)
(component Crystals:Crystal_HC50_Vertical
(place Y1 44450 -39370 front 90 (PN "16 MHz"))
)
)
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(pin Rect[A]Pad_1600x1600_um 1 0 0)
(pin Round[A]Pad_1600_um 2 2500 0)
)
(image Capacitors_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm
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(outline (path signal 50 3550 1150 -1050 1150))
(pin Round[A]Pad_1600_um 1 0 0)
(pin Round[A]Pad_1600_um 2 2500 0)
)
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(pin Rect[A]Pad_1800x2600_um 1 0 0)
(pin Oval[A]Pad_1800x2600_um 2 2540 0)
(pin Oval[A]Pad_1800x2600_um 3 5080 0)
(pin Oval[A]Pad_1800x2600_um 4 7620 0)
(pin Oval[A]Pad_1800x2600_um 5 10160 0)
(pin Oval[A]Pad_1800x2600_um 6 12700 0)
(pin Oval[A]Pad_1800x2600_um 7 15240 0)
(pin Oval[A]Pad_1800x2600_um 8 17780 0)
(pin Oval[A]Pad_1800x2600_um 9 20320 0)
(pin Oval[A]Pad_1800x2600_um 10 22860 0)
(pin Oval[A]Pad_1800x2600_um 11 25400 0)
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(pin Oval[A]Pad_1800x2600_um 14 33020 0)
(pin Oval[A]Pad_1800x2600_um 15 35560 0)
(pin Oval[A]Pad_1800x2600_um 16 38100 0)
(pin Round[A]Pad_3000_um @1 -5499.1 0)
(pin Round[A]Pad_3000_um @2 -5499.1 -31000.7)
(pin Round[A]Pad_3000_um @3 69499.5 -31000.7)
(pin Round[A]Pad_3000_um @4 69500 0)
)
(image "Connectors:PINHEAD1-2"
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(pin Oval[A]Pad_1510x3010_um 1 0 0)
(pin Oval[A]Pad_1510x3010_um 2 2540 0)
)
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(pin Round[A]Pad_1143_um 1 0 0)
)
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)
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)
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(pin Round[A]Pad_2000_um (rotate 90) 2 0 -4500)
(pin Round[A]Pad_2000_um (rotate 90) 1 0 0)
(pin Round[A]Pad_2000_um (rotate 90) 2@1 6500 -4500)
(pin Round[A]Pad_2000_um (rotate 90) 1@1 6500 0)
)
(image "TO_SOT_Packages_THT:TO-220-3_Vertical"
(outline (path signal 100 -2460 2500 -2460 -1900))
(outline (path signal 100 -2460 -1900 7540 -1900))
(outline (path signal 100 7540 -1900 7540 2500))
(outline (path signal 100 7540 2500 -2460 2500))
(outline (path signal 100 -2460 1230 7540 1230))
(outline (path signal 100 690 2500 690 1230))
(outline (path signal 100 4390 2500 4390 1230))
(outline (path signal 120 -2580 2620 7660 2620))
(outline (path signal 120 -2580 -2021 7660 -2021))
(outline (path signal 120 -2580 2620 -2580 -2021))
(outline (path signal 120 7660 2620 7660 -2021))
(outline (path signal 120 -2580 1110 7660 1110))
(outline (path signal 120 690 2620 690 1110))
(outline (path signal 120 4391 2620 4391 1110))
(outline (path signal 50 -2710 2750 -2710 -2160))
(outline (path signal 50 -2710 -2160 7790 -2160))
(outline (path signal 50 7790 -2160 7790 2750))
(outline (path signal 50 7790 2750 -2710 2750))
(pin Rect[A]Pad_1800x1800_um 1 0 0)
(pin Oval[A]Pad_1800x1800_um 2 2540 0)
(pin Oval[A]Pad_1800x1800_um 3 5080 0)
)
(image Pin_Headers:Pin_Header_Straight_1x05_Pitch1.00mm
(outline (path signal 100 -317.5 500 635 500))
(outline (path signal 100 635 500 635 -4500))
(outline (path signal 100 635 -4500 -635 -4500))
(outline (path signal 100 -635 -4500 -635 182.5))
(outline (path signal 100 -635 182.5 -317.5 500))
(outline (path signal 120 -695 -4560 -394.493 -4560))
(outline (path signal 120 394.493 -4560 695 -4560))
(outline (path signal 120 -695 -685 -695 -4560))
(outline (path signal 120 695 -685 695 -4560))
(outline (path signal 120 -695 -685 -608.276 -685))
(outline (path signal 120 608.276 -685 695 -685))
(outline (path signal 120 -695 0 -695 685))
(outline (path signal 120 -695 685 0 685))
(outline (path signal 50 -1150 1000 -1150 -5000))
(outline (path signal 50 -1150 -5000 1150 -5000))
(outline (path signal 50 1150 -5000 1150 1000))
(outline (path signal 50 1150 1000 -1150 1000))
(pin Rect[A]Pad_850x850_um 1 0 0)
(pin Oval[A]Pad_850x850_um 2 0 -1000)
(pin Oval[A]Pad_850x850_um 3 0 -2000)
(pin Oval[A]Pad_850x850_um 4 0 -3000)
(pin Oval[A]Pad_850x850_um 5 0 -4000)
)
(image Pin_Headers:Pin_Header_Straight_1x03_Pitch1.00mm
(outline (path signal 100 -317.5 500 635 500))
(outline (path signal 100 635 500 635 -2500))
(outline (path signal 100 635 -2500 -635 -2500))
(outline (path signal 100 -635 -2500 -635 182.5))
(outline (path signal 100 -635 182.5 -317.5 500))
(outline (path signal 120 -695 -2560 -394.493 -2560))
(outline (path signal 120 394.493 -2560 695 -2560))
(outline (path signal 120 -695 -685 -695 -2560))
(outline (path signal 120 695 -685 695 -2560))
(outline (path signal 120 -695 -685 -608.276 -685))
(outline (path signal 120 608.276 -685 695 -685))
(outline (path signal 120 -695 0 -695 685))
(outline (path signal 120 -695 685 0 685))
(outline (path signal 50 -1150 1000 -1150 -3000))
(outline (path signal 50 -1150 -3000 1150 -3000))
(outline (path signal 50 1150 -3000 1150 1000))
(outline (path signal 50 1150 1000 -1150 1000))
(pin Rect[A]Pad_850x850_um 1 0 0)
(pin Oval[A]Pad_850x850_um 2 0 -1000)
(pin Oval[A]Pad_850x850_um 3 0 -2000)
)
(image "Housings_DIP:DIP-28_W7.62mm_Socket"
(outline (path signal 100 1635 1270 6985 1270))
(outline (path signal 100 6985 1270 6985 -34290))
(outline (path signal 100 6985 -34290 635 -34290))
(outline (path signal 100 635 -34290 635 270))
(outline (path signal 100 635 270 1635 1270))
(outline (path signal 100 -1270 1330 -1270 -34350))
(outline (path signal 100 -1270 -34350 8890 -34350))
(outline (path signal 100 8890 -34350 8890 1330))
(outline (path signal 100 8890 1330 -1270 1330))
(outline (path signal 120 2810 1330 1160 1330))
(outline (path signal 120 1160 1330 1160 -34350))
(outline (path signal 120 1160 -34350 6460 -34350))
(outline (path signal 120 6460 -34350 6460 1330))
(outline (path signal 120 6460 1330 4810 1330))
(outline (path signal 120 -1330 1390 -1330 -34410))
(outline (path signal 120 -1330 -34410 8950 -34410))
(outline (path signal 120 8950 -34410 8950 1390))
(outline (path signal 120 8950 1390 -1330 1390))
(outline (path signal 50 -1550 1600 -1550 -34650))
(outline (path signal 50 -1550 -34650 9150 -34650))
(outline (path signal 50 9150 -34650 9150 1600))
(outline (path signal 50 9150 1600 -1550 1600))
(pin Rect[A]Pad_1600x1600_um 1 0 0)
(pin Oval[A]Pad_1600x1600_um 15 7620 -33020)
(pin Oval[A]Pad_1600x1600_um 2 0 -2540)
(pin Oval[A]Pad_1600x1600_um 16 7620 -30480)
(pin Oval[A]Pad_1600x1600_um 3 0 -5080)
(pin Oval[A]Pad_1600x1600_um 17 7620 -27940)
(pin Oval[A]Pad_1600x1600_um 4 0 -7620)
(pin Oval[A]Pad_1600x1600_um 18 7620 -25400)
(pin Oval[A]Pad_1600x1600_um 5 0 -10160)
(pin Oval[A]Pad_1600x1600_um 19 7620 -22860)
(pin Oval[A]Pad_1600x1600_um 6 0 -12700)
(pin Oval[A]Pad_1600x1600_um 20 7620 -20320)
(pin Oval[A]Pad_1600x1600_um 7 0 -15240)
(pin Oval[A]Pad_1600x1600_um 21 7620 -17780)
(pin Oval[A]Pad_1600x1600_um 8 0 -17780)
(pin Oval[A]Pad_1600x1600_um 22 7620 -15240)
(pin Oval[A]Pad_1600x1600_um 9 0 -20320)
(pin Oval[A]Pad_1600x1600_um 23 7620 -12700)
(pin Oval[A]Pad_1600x1600_um 10 0 -22860)
(pin Oval[A]Pad_1600x1600_um 24 7620 -10160)
(pin Oval[A]Pad_1600x1600_um 11 0 -25400)
(pin Oval[A]Pad_1600x1600_um 25 7620 -7620)
(pin Oval[A]Pad_1600x1600_um 12 0 -27940)
(pin Oval[A]Pad_1600x1600_um 26 7620 -5080)
(pin Oval[A]Pad_1600x1600_um 13 0 -30480)
(pin Oval[A]Pad_1600x1600_um 27 7620 -2540)
(pin Oval[A]Pad_1600x1600_um 14 0 -33020)
(pin Oval[A]Pad_1600x1600_um 28 7620 0)
)
(image Pin_Headers:Pin_Header_Straight_1x06_Pitch1.00mm
(outline (path signal 100 -317.5 500 635 500))
(outline (path signal 100 635 500 635 -5500))
(outline (path signal 100 635 -5500 -635 -5500))
(outline (path signal 100 -635 -5500 -635 182.5))
(outline (path signal 100 -635 182.5 -317.5 500))
(outline (path signal 120 -695 -5560 -394.493 -5560))
(outline (path signal 120 394.493 -5560 695 -5560))
(outline (path signal 120 -695 -685 -695 -5560))
(outline (path signal 120 695 -685 695 -5560))
(outline (path signal 120 -695 -685 -608.276 -685))
(outline (path signal 120 608.276 -685 695 -685))
(outline (path signal 120 -695 0 -695 685))
(outline (path signal 120 -695 685 0 685))
(outline (path signal 50 -1150 1000 -1150 -6000))
(outline (path signal 50 -1150 -6000 1150 -6000))
(outline (path signal 50 1150 -6000 1150 1000))
(outline (path signal 50 1150 1000 -1150 1000))
(pin Rect[A]Pad_850x850_um 1 0 0)
(pin Oval[A]Pad_850x850_um 2 0 -1000)
(pin Oval[A]Pad_850x850_um 3 0 -2000)
(pin Oval[A]Pad_850x850_um 4 0 -3000)
(pin Oval[A]Pad_850x850_um 5 0 -4000)
(pin Oval[A]Pad_850x850_um 6 0 -5000)
)
(image Crystals:Crystal_HC50_Vertical
(outline (path signal 100 -750 2325 5650 2325))
(outline (path signal 100 -750 -2325 5650 -2325))
(outline (path signal 100 -750 1900 5650 1900))
(outline (path signal 100 -750 -1900 5650 -1900))
(outline (path signal 120 -750 2525 5650 2525))
(outline (path signal 120 -750 -2525 5650 -2525))
(outline (path signal 50 -3600 2800 -3600 -2800))
(outline (path signal 50 -3600 -2800 8500 -2800))
(outline (path signal 50 8500 -2800 8500 2800))
(outline (path signal 50 8500 2800 -3600 2800))
(pin Round[A]Pad_2300_um 1 0 0)
(pin Round[A]Pad_2300_um 2 4900 0)
)
(padstack Round[A]Pad_1143_um
(shape (circle F.Cu 1143))
(shape (circle B.Cu 1143))
(attach off)
)
(padstack Round[A]Pad_1600_um
(shape (circle F.Cu 1600))
(shape (circle B.Cu 1600))
(attach off)
)
(padstack Round[A]Pad_2000_um
(shape (circle F.Cu 2000))
(shape (circle B.Cu 2000))
(attach off)
)
(padstack Round[A]Pad_2300_um
(shape (circle F.Cu 2300))
(shape (circle B.Cu 2300))
(attach off)
)
(padstack Round[A]Pad_3000_um
(shape (circle F.Cu 3000))
(shape (circle B.Cu 3000))
(attach off)
)
(padstack Oval[A]Pad_1510x3010_um
(shape (path F.Cu 1510 0 -750 0 750))
(shape (path B.Cu 1510 0 -750 0 750))
(attach off)
)
(padstack Oval[A]Pad_1600x1600_um
(shape (path F.Cu 1600 0 0 0 0))
(shape (path B.Cu 1600 0 0 0 0))
(attach off)
)
(padstack Oval[A]Pad_1800x2600_um
(shape (path F.Cu 1800 0 -400 0 400))
(shape (path B.Cu 1800 0 -400 0 400))
(attach off)
)
(padstack Oval[A]Pad_1800x1800_um
(shape (path F.Cu 1800 0 0 0 0))
(shape (path B.Cu 1800 0 0 0 0))
(attach off)
)
(padstack Oval[A]Pad_850x850_um
(shape (path F.Cu 850 0 0 0 0))
(shape (path B.Cu 850 0 0 0 0))
(attach off)
)
(padstack Rect[A]Pad_850x850_um
(shape (rect F.Cu -425 -425 425 425))
(shape (rect B.Cu -425 -425 425 425))
(attach off)
)
(padstack Rect[T]Pad_1200x1200_um
(shape (rect F.Cu -600 -600 600 600))
(attach off)
)
(padstack Rect[T]Pad_1600x1500_um
(shape (rect F.Cu -800 -750 800 750))
(attach off)
)
(padstack Rect[A]Pad_1600x1600_um
(shape (rect F.Cu -800 -800 800 800))
(shape (rect B.Cu -800 -800 800 800))
(attach off)
)
(padstack Rect[A]Pad_1800x2600_um
(shape (rect F.Cu -900 -1300 900 1300))
(shape (rect B.Cu -900 -1300 900 1300))
(attach off)
)
(padstack Rect[A]Pad_1800x1800_um
(shape (rect F.Cu -900 -900 900 900))
(shape (rect B.Cu -900 -900 900 900))
(attach off)
)
(padstack "Via[0-1]_600:400_um"
(shape (circle F.Cu 600))
(shape (circle B.Cu 600))
(attach off)
)
)
(network
(net "Net-(C1-Pad1)"
(pins C1-1 J1-1 U1-1)
)
(net "Net-(C1-Pad2)"
(pins C1-2 C2-2 C3-1 C4-2 DS1-1 DS1-5 DS1-16 J1-2 JP1-2 R2-1 RV1-3 U1-2 U3-5
U4-1 U5-15 U5-16 U5-17 U5-10 U6-6 U7-6 U8-6 U9-6 U10-6 U2-8 U2-22)
)
(net "Net-(C2-Pad1)"
(pins C2-1 DS1-2 R1-1 R3-1 RV1-1 U1-3 U3-4 U4-3 U5-18 U5-9 U6-5 U7-5 U8-5 U9-5
U10-5 U2-20 U2-7 U2-21)
)
(net "Net-(C3-Pad2)"
(pins C3-2 Y1-2 U2-9)
)
(net "Net-(C4-Pad1)"
(pins C4-1 Y1-1 U2-10)
)
(net "Net-(DS1-Pad3)"
(pins DS1-3 RV1-2)
)
(net "Net-(DS1-Pad4)"
(pins DS1-4 U2-5)
)
(net "Net-(DS1-Pad6)"
(pins DS1-6 U2-4)
)
(net "Net-(DS1-Pad7)"
(pins DS1-7)
)
(net "Net-(DS1-Pad8)"
(pins DS1-8)
)
(net "Net-(DS1-Pad9)"
(pins DS1-9)
)
(net "Net-(DS1-Pad10)"
(pins DS1-10)
)
(net "Net-(DS1-Pad11)"
(pins DS1-11 U2-6)
)
(net "Net-(DS1-Pad12)"
(pins DS1-12 U2-11)
)
(net "Net-(DS1-Pad13)"
(pins DS1-13 U2-12)
)
(net "Net-(DS1-Pad14)"
(pins DS1-14 U2-13)
)
(net "Net-(DS1-Pad15)"
(pins DS1-15 U2-15)
)
(net "Net-(J2-Pad1)"
(pins J2-1 U2-2)
)
(net "Net-(J2-Pad2)"
(pins J2-2 U2-3)
)
(net "Net-(J3-Pad1)"
(pins J3-1 U2-23)
)
(net "Net-(J4-Pad1)"
(pins J4-1 U2-24)
)
(net "Net-(J5-Pad1)"
(pins J5-1 U2-25)
)
(net "Net-(JP1-Pad1)"
(pins JP1-1 R1-2 U2-1)
)
(net "Net-(R2-Pad2)"
(pins R2-2 SW1-2 SW1-2@1 SW2-2 SW2-2@1 SW3-2 SW3-2@1 U2-26)
)
(net "Net-(R3-Pad2)"
(pins R3-2 R4-1 SW1-1 SW1-1@1)
)
(net "Net-(R4-Pad2)"
(pins R4-2 R5-1 SW2-1 SW2-1@1)
)
(net "Net-(R5-Pad2)"
(pins R5-2 SW3-1 SW3-1@1)
)
(net "Net-(U2-Pad16)"
(pins U6-1 U2-16)
)
(net "Net-(U2-Pad17)"
(pins U6-2 U2-17)
)
(net "Net-(U2-Pad18)"
(pins U6-3 U2-18)
)
(net "Net-(U2-Pad19)"
(pins U6-4 U2-19)
)
(net "Net-(U2-Pad27)"
(pins U3-3 U5-13 U2-27)
)
(net "Net-(U2-Pad14)"
(pins U4-2 U2-14)
)
(net "Net-(U2-Pad28)"
(pins U3-2 U5-12 U2-28)
)
(net "Net-(U3-Pad1)"
(pins U3-1)
)
(net "Net-(U5-Pad1)"
(pins U5-1 U7-1)
)
(net "Net-(U5-Pad2)"
(pins U5-2 U7-2)
)
(net "Net-(U5-Pad3)"
(pins U5-3 U7-3)
)
(net "Net-(U5-Pad4)"
(pins U5-4 U7-4)
)
(net "Net-(U5-Pad5)"
(pins U5-5 U8-1)
)
(net "Net-(U5-Pad19)"
(pins U5-19)
)
(net "Net-(U5-Pad6)"
(pins U5-6 U8-2)
)
(net "Net-(U5-Pad20)"
(pins U5-20)
)
(net "Net-(U5-Pad7)"
(pins U5-7 U8-3)
)
(net "Net-(U5-Pad21)"
(pins U5-21 U9-1)
)
(net "Net-(U5-Pad8)"
(pins U5-8 U8-4)
)
(net "Net-(U5-Pad22)"
(pins U5-22 U9-2)
)
(net "Net-(U5-Pad23)"
(pins U5-23 U9-3)
)
(net "Net-(U5-Pad24)"
(pins U5-24 U9-4)
)
(net "Net-(U10-Pad1)"
(pins U5-25 U10-1)
)
(net "Net-(U10-Pad2)"
(pins U5-26 U10-2)
)
(net "Net-(U10-Pad3)"
(pins U5-27 U10-3)
)
(net "Net-(U10-Pad4)"
(pins U5-28 U10-4)
)
(class kicad_default "" "Net-(C1-Pad1)" "Net-(C1-Pad2)" "Net-(C2-Pad1)"
"Net-(C3-Pad2)" "Net-(C4-Pad1)" "Net-(DS1-Pad10)" "Net-(DS1-Pad11)"
"Net-(DS1-Pad12)" "Net-(DS1-Pad13)" "Net-(DS1-Pad14)" "Net-(DS1-Pad15)"
"Net-(DS1-Pad3)" "Net-(DS1-Pad4)" "Net-(DS1-Pad6)" "Net-(DS1-Pad7)"
"Net-(DS1-Pad8)" "Net-(DS1-Pad9)" "Net-(J2-Pad1)" "Net-(J2-Pad2)" "Net-(J3-Pad1)"
"Net-(J4-Pad1)" "Net-(J5-Pad1)" "Net-(JP1-Pad1)" "Net-(R2-Pad2)" "Net-(R3-Pad2)"
"Net-(R4-Pad2)" "Net-(R5-Pad2)" "Net-(U10-Pad1)" "Net-(U10-Pad2)" "Net-(U10-Pad3)"
"Net-(U10-Pad4)" "Net-(U2-Pad14)" "Net-(U2-Pad16)" "Net-(U2-Pad17)"
"Net-(U2-Pad18)" "Net-(U2-Pad19)" "Net-(U2-Pad27)" "Net-(U2-Pad28)"
"Net-(U3-Pad1)" "Net-(U5-Pad1)" "Net-(U5-Pad19)" "Net-(U5-Pad2)" "Net-(U5-Pad20)"
"Net-(U5-Pad21)" "Net-(U5-Pad22)" "Net-(U5-Pad23)" "Net-(U5-Pad24)"
"Net-(U5-Pad3)" "Net-(U5-Pad4)" "Net-(U5-Pad5)" "Net-(U5-Pad6)" "Net-(U5-Pad7)"
"Net-(U5-Pad8)"
(circuit
(use_via Via[0-1]_600:400_um)
)
(rule
(width 250)
(clearance 200.1)
)
)
)
(wiring
(wire (path B.Cu 250 15240 -31750 15240 -26670 17780 -24130)(net "Net-(C1-Pad1)")(type protect))
(wire (path B.Cu 250 17780 -16510 17780 -24130)(net "Net-(C1-Pad1)")(type protect))
(wire (path B.Cu 250 20320 -27940 22860 -27940)(net "Net-(C1-Pad2)")(type protect))
(wire (path B.Cu 250 24090 -29170 25360 -31750)(net "Net-(C1-Pad2)")(type protect))
(wire (path B.Cu 250 22860 -27940 24090 -29170)(net "Net-(C1-Pad2)")(type protect))
(wire (path B.Cu 250 17740 -31750 17740 -30520)(net "Net-(C1-Pad2)")(type protect))
(wire (path B.Cu 250 20320 -27940 20320 -24130)(net "Net-(C1-Pad2)")(type protect))
(wire (path B.Cu 250 17740 -30520 20320 -27940)(net "Net-(C1-Pad2)")(type protect))
(wire (path B.Cu 250 20320 -16510 20320 -24130)(net "Net-(C1-Pad2)")(type protect))
(wire (path B.Cu 250 22860 -24130 25400 -24130)(net "Net-(C2-Pad1)")(type protect))
(wire (path B.Cu 250 24130 -33020 22860 -31750)(net "Net-(C2-Pad1)")(type protect))
(wire (path B.Cu 250 25400 -34290 24130 -33020)(net "Net-(C2-Pad1)")(type protect))
(wire (path B.Cu 250 27940 -34290 25400 -34290)(net "Net-(C2-Pad1)")(type protect))
(wire (path B.Cu 250 27940 -27940 27940 -34290)(net "Net-(C2-Pad1)")(type protect))
(wire (path B.Cu 250 25400 -24130 27940 -27940)(net "Net-(C2-Pad1)")(type protect))
)
)
Reference in New Issue View Git Blame Copy Permalink